On 01/20/2015 09:11 AM, Matthew Fortune wrote: > Maciej W. Rozycki <macro@xxxxxxxxxxxxxx> writes: >> On Fri, 16 Jan 2015, Markos Chandras wrote: >> >>> GCC versions supporting MIPS R6 use the ZC constraint to enforce a >>> 9-bit offset for MIPS R6. We will use that for all MIPS R6 LL/SC >>> instructions. >>> >>> Cc: Matthew Fortune <Matthew.Fortune@xxxxxxxxxx> >>> Signed-off-by: Markos Chandras <markos.chandras@xxxxxxxxxx> >>> --- >>> arch/mips/include/asm/compiler.h | 10 +++++++++- >>> 1 file changed, 9 insertions(+), 1 deletion(-) >>> >>> diff --git a/arch/mips/include/asm/compiler.h >> b/arch/mips/include/asm/compiler.h >>> index c73815e0123a..8f8ed0245a09 100644 >>> --- a/arch/mips/include/asm/compiler.h >>> +++ b/arch/mips/include/asm/compiler.h >>> @@ -16,12 +16,20 @@ >>> #define GCC_REG_ACCUM "accum" >>> #endif >>> >>> +#ifdef CONFIG_CPU_MIPSR6 >>> +/* >>> + * GCC uses ZC for MIPS R6 to indicate a 9-bit offset although >>> + * the macro name is a bit misleading >>> + */ >>> +#define GCC_OFF12_ASM() "ZC" >>> +#else >>> #ifndef CONFIG_CPU_MICROMIPS >>> #define GCC_OFF12_ASM() "R" >>> #elif __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 9) >>> #define GCC_OFF12_ASM() "ZC" >>> #else >>> #error "microMIPS compilation unsupported with GCC older than 4.9" >>> -#endif >>> +#endif /* CONFIG_CPU_MICROMIPS */ >>> +#endif /* CONFIG_CPU_MIPSR6 */ >>> >>> #endif /* _ASM_COMPILER_H */ >> >> I'd prefer to have a GCC version trap here just like with the microMIPS >> constraint. What is the first upstream version to support R6? 5.0? > > Correct. We have tools out there based on 4.9. If we make gcc < 5.0 to fail with R6, then nobody will be able to build it until 5.0 is released. Perhaps it makes sense to add some checks in arch/mips/Makefile, see if our gcc supports -mips32r6 or something and then decide what to do. -- markos
