On Tue, Jun 03, 2014 at 12:29:17PM +0200, Lars Persson wrote: > Good point. Would adding !cpu_has_ic_fills_f_dc as an extra condition in set_pte_at be sufficient to address your concern ? Returning to this old thread ... cpu_has_ic_fills_f_dc means a CPU's data cache does not need to be written back to secondary cache or memory when instructions have been updated in memory. In other words a CPU can refill the I-cache from the D-cache on an I-cache miss. Only the Alchemy cores have this handy property. The flag is also being set for XL? CPUs in arch/mips/include/asm/mach-netlogic/cpu-feature-overrides.h but not anywhere in the probe code of arch/mips/mm/c-r4k.c which might stil be correct - but it's at least a bit sloppy and suspicious so I'm wondering if it's correct indeed. Jayachandran? Ralf
