On Tue, 18 Nov 2014, Joshua Kinard wrote: > >> CPU: 0 PID: 54 Comm: grep Not tainted 3.18.0-rc4 #194 > >> task: a800000059b80000 ti: a8000000595c4000 task.ti: a8000000595c4000 > >> $ 0 : 0000000000000000 ffffffff9004fce0 ffffffffffffffff ffffffffffffffff > >> $ 4 : 0000000077d809a0 0000000000000000 ffffffffffffffff ffffffffffffffff > >> $ 8 : 0000000000440f14 0000000000439bdc 0000000000000058 0000000000000000 > >> $12 : 0000000000000000 a800000059b88aa0 a8000000200d22d0 001c450400000018 > >> $16 : 0000000077d809a0 0000000077e3f000 0000000000000000 0000000000000000 > >> $20 : 0000000077d803b4 0000000000000001 0000000077d82604 000000007ff808f8 > >> $24 : 0018460400000000 0000000077c7aa90 > >> $28 : 0000000077d88e10 000000007ff807c0 000000007ff807c0 0000000077c68bdc > >> Hi : 0000000000061170 > >> Lo : 00000000000205d0 > >> epc : 0000000077c7ab00 0x77c7ab00 > >> Not tainted > >> ra : 0000000077c68bdc 0x77c68bdc > >> Status: 8004fcf3 KX SX UX KERNEL EXL IE [...] > This is an o32 userland. So that means, given 64-bit wide registers, o32 is > going to stuff two 32-bit quantities into them? I have an n32 chroot on a > different partition, but I haven't tried it w/ CONFIG_SMP yet. No, user registers have to be treated as 32-bit, that is sign-extended from bit #31 (bits 63:32 are a copy of bit #31). Using 32-bit operations only guarantees that, e.g. when you load a register from its stack slot using the 32-bit LW instruction, then on a 64-bit processor it will get sign-extended in the hardware register from bit #31 through to bit #63. Of course an o32 bit program does not see it, it sees the environment as it would on a 32-bit processor as it is supposed to run the same on a true 32-bit processor. Well, strictly speaking this is not completely true on Linux, for that to be the case the UX bit you see set in the Status register dumped above would have to be cleared, but this is a historical artefact and nobody has had the incentive to clean this up yet (in a reference environment you want UX clear for o32, UX set for n64 and PX set for n32 where available, otherwise UX set). Clearing the UX bit disables all the 64-bit instructions in the user mode making a user program unable to see or modify the upper 32 bits of any general register (they're still sign-extended automatically). Please do yourself a favour and read a good MIPS architecture book; Dominic Sweetman's "See MIPS Run" would be my recommendation and its second edition has some focus on Linux too that might help. Without a good understanding of the architecture you'll be having a very, very hard time debugging such low-level issues. Maciej
