On 11/03/2014 00:54, Joshua Kinard wrote: > > I've recently acquired a dual R14000 CPU for the Octane, so I am trying to get > SMP working again, but I can't get things setup properly. I've attached both > ip30-irq.c and ip30-smp.c -- does anyone see any immediate problems (or just > where I am doing it wrong)? > > Most reboot cycles with this code panics because init exited with a code of 0xa > or 0xb (which matches w/ SIGSEGV or SIGBUS). Randomly, I can acquire a dash > shell by passing init=/bin/dash. I can't do much in it, though. A basic 'ls' > either segfaults or triggers a SIGBUS. If I execute 'ls' enough times, it > eventually works. Can't get much farther beyond that. I take it no one has any feedback or tips on this? I think one of the problems is I'm not syncing the CPU timers (IP7) correctly. The old IP30 SMP code used a timer broadcast trick yo do this, sharing a single IRQ, #63. However, 63 is one of the hardware error IRQs. Still not sure how that ever worked. I've tried using the sync-r4k module...that just hangs in the sync function. atomics seemed messed up (I wonder if PR61538 has something to do...). Also tried re-implementing the timer broadcast but that just hangs because the two CPUs get into a deadlock situation w/ each trying to tell the other about the timer broadcast event. Not even sure if I should be using spin_lock/spin_unlock or spin_lock_irqsave/spin_unlock_irqrestore for the HEART irq code or SMP IRQ code. Each MIPS SMP machine seems to use a completely different mechanism in the kernel. IP27 doesn't even enable the CPU timer IRQs, it looks, and relies solely on the HUB timer present on each nodeboard. So, yeah, out of ideas. -- Joshua Kinard Gentoo/MIPS kumba@xxxxxxxxxx 4096R/D25D95E3 2011-03-28 "The past tempts us, the present confuses us, the future frightens us. And our lives slip away, moment by moment, lost in that vast, terrible in-between." --Emperor Turhan, Centauri Republic
