Re: Single MIPS kernel

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On 10/22/2014 02:53 PM, James Hogan wrote:
Hi,

On Wed, Oct 22, 2014 at 10:42:09PM +0200, Ralf Baechle wrote:
On Wed, Oct 22, 2014 at 08:19:07PM +0100, Maciej W. Rozycki wrote:
  Wouldn't it make sense to make a unified kernel virtually mapped?  That
would avoid the issue with RAM being present at different locations across
systems and also if big pages were used, that I believe are available
almost universally across the MIPS family, any performance hit would be
minimal.  There would be hardly any increase in the binary image size too.
Run-time mappings such as `kmalloc' or `ioremap' could continue using
unmapped segments.

Otoh the mapped kernel certainly would have the lowest size overhead.
I have faint memories of restrictions for TLB instructions or was it
TLB exception handlers into mapped space, would have to do some rtfming
on that topic.

Yeh, KVM puts all tlb handling in arch/mips/kvm/tlb.c, which is built
statically rather than being included in the kvm kernel module, exactly
for this reason, so that it resides in unmapped memory space.

You'd have to guarantee not to get a TLB exception while the TLB
registers contain important values, since they'll get clobbered by the
taking of the exception itself (e.g. EntryHi gets set to failing
address, EntryLo* undefined), or the TLB entry pointed to by CP0_Index
may be replaced.

There's always CP0_Wired - its use in the kernel is a bit of a mess atm
IIRC.


The current kernel.org kernel respects CP0_Wired. We use a single TLB entry (index 0) to map the entire kernel, and set CP0_Wired accordingly. Everything works.

EBase still points to an unmapped address, so exception handlers still work as before, except they may have to use more code to directly call into the kernel due to the 256MB jump range thing. The general exception handler looks up the addresses in a table to that is not effected, only if you have a dedicated interrupt vector, do you have to use an indirect jump to reach the kernel.

David Daney






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