The CM registers use native endianness, so using plain readl & writel
will produce incorrect results on big endian systems.
Reported-by: Jeffrey Deans <jeffrey.deans@xxxxxxxxxx>
Signed-off-by: Paul Burton <paul.burton@xxxxxxxxxx>
---
Feel free to apply as a fixup for "MIPS: Add generic CM probe & access
code".
---
arch/mips/include/asm/mips-cm.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/mips/include/asm/mips-cm.h b/arch/mips/include/asm/mips-cm.h
index 12cae5e..6a9d2dd 100644
--- a/arch/mips/include/asm/mips-cm.h
+++ b/arch/mips/include/asm/mips-cm.h
@@ -96,13 +96,13 @@ static inline u32 *addr_gcr_##name(void) \
\
static inline u32 read_gcr_##name(void) \
{ \
- return readl(addr_gcr_##name()); \
+ return __raw_readl(addr_gcr_##name()); \
}
#define BUILD_CM__W(name, off) \
static inline void write_gcr_##name(u32 value) \
{ \
- writel(value, addr_gcr_##name()); \
+ __raw_writel(value, addr_gcr_##name()); \
}
#define BUILD_CM_RW(name, off) \
--
1.8.5.3
