Now that this retrieves the correct value there is no need to skip it
when CONFIG_MIPS_CPS is enabled.
Signed-off-by: Paul Burton <paul.burton@xxxxxxxxxx>
---
Feel free to apply this as a fixup to "MIPS: Coherent Processing System
SMP implementation", though preferrably after "MIPS: fix core number
detection for MT cores" in order to avoid brokenness.
---
arch/mips/kernel/cpu-probe.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 79526b2..3c1a77f 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -420,13 +420,11 @@ static void decode_configs(struct cpuinfo_mips *c)
mips_probe_watch_registers(c);
-#ifndef CONFIG_MIPS_CPS
if (cpu_has_mips_r2) {
c->core = read_c0_ebase() & 0x3ff;
if (cpu_has_mipsmt)
c->core >>= fls(smp_num_siblings) - 1;
}
-#endif
}
#define R4K_OPTS (MIPS_CPU_TLB | MIPS_CPU_4KEX | MIPS_CPU_4K_CACHE \
--
1.8.5.3
