2014/1/22 Ralf Baechle <ralf@xxxxxxxxxxxxxx>: > On Wed, Jan 15, 2014 at 11:05:22AM -0800, Florian Fainelli wrote: > >> When a platform overrides the dcache_line_size detection in its >> cpu-features-override.h file, check that the value matches >> (1 << CONFIG_MIPS_L1_SHIFT) to ensure both settings are correct. > > Conceptually wrong - the two values serve an entirely different purpose. > dcache_line_size is used for cache maintenance by the MIPS code while > CONFIG_MIPS_L1_SHIFT - which has to be a constant due to the way it's > being used - are being used to define L1_CACHE_SHIFT in <asm/cache.h> > which in turn is being used primarily to optimize the memory layout of > various structures for performance - and in case of IP27 we lie, set > L1_CACHE_SHIFT to 7 which is the size of the S-cache. > > On top of that it breaks the ip27 build. > > And while we're at it, the use of CONFIG_MIPS_L1_SHIFT in > arch/mips/kernel/vmlinux.lds.S is fishy - but it needs a constant and > this should be good enough for all users. Fair enough, feel free to revert these commits and fix vmlinux.lds.S while at it. -- Florian
