When a platform overrides the dcache_line_size detection in its cpu-features-override.h file, check that the value matches (1 << CONFIG_MIPS_L1_SHIFT) to ensure both settings are correct. Signed-off-by: Florian Fainelli <florian@xxxxxxxxxxx> --- arch/mips/include/asm/cpu-features.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h index 6e70b03..9052fb9 100644 --- a/arch/mips/include/asm/cpu-features.h +++ b/arch/mips/include/asm/cpu-features.h @@ -279,6 +279,10 @@ #ifndef cpu_dcache_line_size #define cpu_dcache_line_size() cpu_data[0].dcache.linesz +#else +#if (cpu_dcache_line_size() != (1 << CONFIG_MIPS_L1_CACHE_SHIFT)) +#error "cpu_dcache_line_size does not match CONFIG_MIPS_L1_CACHE_SHIFT" +#endif #endif #ifndef cpu_icache_line_size #define cpu_icache_line_size() cpu_data[0].icache.linesz -- 1.8.3.2
