From: John Crispin <blogic@xxxxxxxxxxx> Register a clock device for the SPI block of the MT7620 SoC. The clock device will be used by the SPI host controller driver to determine the base clock of the controller. Signed-off-by: John Crispin <blogic@xxxxxxxxxxx> Signed-off-by: Gabor Juhos <juhosg@xxxxxxxxxxx> --- This makes the following patch obsolete: https://patchwork.linux-mips.org/patch/5672/ --- arch/mips/ralink/mt7620.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c index 1be3b0a..e7b8e81 100644 --- a/arch/mips/ralink/mt7620.c +++ b/arch/mips/ralink/mt7620.c @@ -323,6 +323,7 @@ void __init ralink_clk_init(void) ralink_clk_add("10000100.timer", periph_rate); ralink_clk_add("10000120.watchdog", periph_rate); ralink_clk_add("10000500.uart", periph_rate); + ralink_clk_add("10000b00.spi", sys_rate); ralink_clk_add("10000c00.uartlite", periph_rate); } -- 1.7.10
