From: John Crispin <blogic@xxxxxxxxxxx> The watchdog driver of the SoC uses the clk API to get the clock associated with the watchdog device. However the MT7620 specific setup code does not register a clock for the watchdog device yet which leads to the following error: rt2880_wdt: probe of 10000120.watchdog failed with error -2 Register a clock device for the watchdog in order to avoid the error and make the watchdog usable. Signed-off-by: John Crispin <blogic@xxxxxxxxxxx> Signed-off-by: Gabor Juhos <juhosg@xxxxxxxxxxx> --- This makes the following patch obsolete: https://patchwork.linux-mips.org/patch/5673/ --- arch/mips/ralink/mt7620.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c index 0ff9244..1be3b0a 100644 --- a/arch/mips/ralink/mt7620.c +++ b/arch/mips/ralink/mt7620.c @@ -321,6 +321,7 @@ void __init ralink_clk_init(void) ralink_clk_add("cpu", cpu_rate); ralink_clk_add("10000100.timer", periph_rate); + ralink_clk_add("10000120.watchdog", periph_rate); ralink_clk_add("10000500.uart", periph_rate); ralink_clk_add("10000c00.uartlite", periph_rate); } -- 1.7.10
