On 06/26/2013 02:41 PM, Maciej W. Rozycki wrote:
Ralf, To complete the image, there is a set of new memory access instructions added (including but not limited to CACHE) that in the kernel mode separates accesses to the user space from accesses to the kernel space, i.e. the same virtual address can map differently depending on which instruction set it is used with. I encourage you to have at least a skim over the most recent set of MIPS architecture manuals publicly available where it all is documented. Maciej
Look into http://www.mips.com/auth/MD00091-2B-MIPS64PRA-AFP-03.52.pdf (registration required). Read sections 4.13, 4.12 and 9.13-9.15. Ignore anything for 64bit core. Sorry, I asked David Lau to update MIPS32 actual docs but it can take time. Right now it is from 2011 year. - Leonid.
