Re: [PATCH 02/18] MIPS: ralink: fix RT305x clock setup

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Hello.

On 10-04-2013 15:47, John Crispin wrote:

Add a few missing clocks and remove the unused sys clock.

Signed-off-by: John Crispin <blogic@xxxxxxxxxxx>
---
  arch/mips/ralink/rt305x.c |   14 ++++++++++++++
  1 file changed, 14 insertions(+)

diff --git a/arch/mips/ralink/rt305x.c b/arch/mips/ralink/rt305x.c
index 0a4bbdc..856ebff 100644
--- a/arch/mips/ralink/rt305x.c
+++ b/arch/mips/ralink/rt305x.c
[...]
@@ -176,11 +177,24 @@ void __init ralink_clk_init(void)
  		BUG();
  	}

+	if (soc_is_rt3352() || soc_is_rt5350()) {
+		u32 val = rt_sysc_r32(RT3352_SYSC_REG_SYSCFG0);

   Empty line wouldn't hurt here...

+		if ((val & RT3352_CLKCFG0_XTAL_SEL) == 0)

   Using ! would make this shorter.

WBR, Sergei



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