On Thu, Oct 11, 2012 at 10:18:51PM +0530, jerin jacob wrote: > CPUNum Field in EBase register is 10bit wide, so after 1 bit right shift, mask > value should be 0x1ff Fortunately nobody has a CMP with more than 256 cores yet :-) Applied. Thanks, Ralf
On Thu, Oct 11, 2012 at 10:18:51PM +0530, jerin jacob wrote: > CPUNum Field in EBase register is 10bit wide, so after 1 bit right shift, mask > value should be 0x1ff Fortunately nobody has a CMP with more than 256 cores yet :-) Applied. Thanks, Ralf