On 08/29/2012 03:34 PM, Jim Quinlan wrote:
For non MIPSr2 processors, such as the BMIPS 5000, calls to arch_local_irq_disable() and others may be preempted, and in doing so a stale value may be restored to c0_status. This fix disables preemption for such processors prior to the call and enables it after the call. This bug was observed in a BMIPS 5000, occuring once every few hours in a continuous reboot test. It was traced to the write_lock_irq() function which was being invoked in release_task() in exit.c. By placing a number of "nops" inbetween the mfc0/mtc0 pair in arch_local_irq_disable(), which is called by write_lock_irq(), we were able to greatly increase the occurance of this bug. Similarly, the application of this commit silenced the bug. It is better to use the preemption functions declared in <linux/preempt.h> rather than defining new ones as is done in this commit. However, including that file from irqflags effected many compiler errors. Signed-off-by: Jim Quinlan <jim2101024@xxxxxxxxx> --- arch/mips/include/asm/irqflags.h | 81 ++++++++++++++++++++++++++++++++++++++ 1 files changed, 81 insertions(+), 0 deletions(-) diff --git a/arch/mips/include/asm/irqflags.h b/arch/mips/include/asm/irqflags.h index 309cbcd..d6e71ed 100644 --- a/arch/mips/include/asm/irqflags.h +++ b/arch/mips/include/asm/irqflags.h @@ -16,6 +16,71 @@ #include <linux/compiler.h> #include <asm/hazards.h> +#if defined(__GENERATING_BOUNDS_H) || defined(__GENERATING_OFFSETS_S) +#define __TI_PRE_COUNT (-1) +#else +#include <asm/asm-offsets.h> +#define __TI_PRE_COUNT TI_PRE_COUNT +#endif + + +/* + * Non-mipsr2 processors executing functions such as arch_local_irq_disable() + * are not preempt-safe: if preemption occurs between the mfc0 and the mtc0, + * a stale status value may be stored. To prevent this, we define + * here arch_local_preempt_disable() and arch_local_preempt_enable(), which + * are called before the mfc0 and after the mtc0, respectively. A better + * solution would "#include <linux/preempt.h> and use its declared routines, + * but that is not viable due to numerous compile errors. + *
I'm with Ralf's idea from the other branch of the thread. Put all this non-mipsr2 stuff out of line (perhaps creating lib/mips-atomic.c).
+ * MipsR2 processors with atomic interrupt enable/disable instructions + * (ei/di) do not have this issue. + */
For mipsr2, we leave them alone so they can be inlined. This way you shouldn't need the ugly #include hackery. David Daney
