On Mon, 7 May 2012, Hill, Steven wrote: > I will certainly remove CONFIG_CPU_HAS_LLSC, thank you. I attempted to > enable 'cpu_has_clo_clz' for SEAD-3, but it breaks my microMIPS-only > kernel builds. Specifically, since microMIPS LL/SC instructions do not > have 16-bit address offsets, in the '__cmpxchg_asm' macro function I get > constraint errors because then the assembler has to use the %LO register > in order to calculate the offset address. I am going to hold off on > enabling the option until after the 3.5 release and then revisit for a > solution. Thank you. It's OK to ask. :) Try using the "YC" constraint, this piece: int test(void *p) { int i; __asm__ __volatile__("ll\t%0,%1" : "=r" (i) : "YC" (*p)); return i; } assembles to: ll $2,0($4) jrc $31 for me (with "-O2 -mmicromips"). You may have to factor in backwards compatibility -- while "YC" is supported both in the microMIPS and the standard MIPS mode, switching the width of the immediate offset between 12 and 16 bits as appropriate, it's certainly a new constraint older compilers did not support. I suggest using a macro, as usually, you can use some existing examples as a reference, e.g. <asm/compiler.h> (you know where to place this stuff now too :) ). Maciej