Hello.
On 05/02/2012 04:27 PM, John Crispin wrote:
Implement pci_load_of_ranges on MIPS. Due to lack of test hardware only 32bit
bus width is supported. This function is based on the implementation found on
powerpc.
Signed-off-by: John Crispin<blogic@xxxxxxxxxxx>
---
Changes in V2
* remove some #ifdefs
* rename to pci_load_of_ranges
arch/mips/include/asm/pci.h | 6 ++++
arch/mips/pci/pci.c | 55 +++++++++++++++++++++++++++++++++++++++++++
2 files changed, 61 insertions(+), 0 deletions(-)
[...]
diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c
index 0514866..4d8a1b6 100644
--- a/arch/mips/pci/pci.c
+++ b/arch/mips/pci/pci.c
[...]
@@ -114,9 +115,63 @@ static void __devinit pcibios_scanbus(struct pci_controller *hose)
[...]
+#ifdef CONFIG_OF
+void __devinit pci_load_of_ranges(struct pci_controller *hose,
+ struct device_node *node)
+{
+ const __be32 *ranges;
+ int rlen;
+ int pna = of_n_addr_cells(node);
+ int np = pna + 5;
+
+ pr_info("PCI host bridge %s ranges:\n", node->full_name);
+ ranges = of_get_property(node, "ranges",&rlen);
+ if (ranges == NULL)
+ return;
+ hose->of_node = node;
+
+ while ((rlen -= np * 4)>= 0) {
+ u32 pci_space;
+ struct resource *res = 0;
s/0/NULL/ to avoid the warning (from sparse?).
WBR, Sergei
