Re: [PATCH v2 01/11] MIPS: BCM63XX: set default pci cache line size.

[Maxime Bizon <mbizon@xxxxxxxxxx>]

On Tue, 2011-11-15 at 19:54 +0000, Ralf Baechle wrote:
> 
> Presumably because the CPU cache line size is 16 bytes?  On MIPS we
> don't set pci_dfl_cache_line_size; a patch (only compile tested) to
> pick a sane default is below.
> 
> Does this work for you? 

[    0.192000] PCI: CLS 0 bytes, default 16

yes it does

-- 
Maxime