[PATCH] MIPS: Octeon: Unconditionally build __cvmx_helper_errata_qlm_disable_2nd_order_cdr

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From: David Daney <david.daney@xxxxxxxxxx>

It is needed in !OCTEON_ETHERNET and !PCI too.  Since most people will
probably have both of these defined in any real configuration, there
is not really any size bloat from doing this.

Signed-off-by: David Daney <david.daney@xxxxxxxxxx>
---
 arch/mips/cavium-octeon/Kconfig            |    4 ----
 arch/mips/cavium-octeon/executive/Makefile |    2 +-
 2 files changed, 1 insertions(+), 5 deletions(-)

diff --git a/arch/mips/cavium-octeon/Kconfig b/arch/mips/cavium-octeon/Kconfig
index cad555e..f9e275a 100644
--- a/arch/mips/cavium-octeon/Kconfig
+++ b/arch/mips/cavium-octeon/Kconfig
@@ -86,10 +86,6 @@ config ARCH_SPARSEMEM_ENABLE
 	def_bool y
 	select SPARSEMEM_STATIC
 
-config CAVIUM_OCTEON_HELPER
-	def_bool y
-	depends on OCTEON_ETHERNET || PCI
-
 config IOMMU_HELPER
 	bool
 
diff --git a/arch/mips/cavium-octeon/executive/Makefile b/arch/mips/cavium-octeon/executive/Makefile
index eec0b88..b6d6e84 100644
--- a/arch/mips/cavium-octeon/executive/Makefile
+++ b/arch/mips/cavium-octeon/executive/Makefile
@@ -16,4 +16,4 @@ obj-y += cvmx-pko.o cvmx-spi.o cvmx-cmd-queue.o \
 	cvmx-helper-loop.o cvmx-helper-spi.o cvmx-helper-util.o \
 	cvmx-interrupt-decodes.o cvmx-interrupt-rsl.o
 
-obj-$(CONFIG_CAVIUM_OCTEON_HELPER) += cvmx-helper-errata.o cvmx-helper-jtag.o
+obj-y += cvmx-helper-errata.o cvmx-helper-jtag.o
-- 
1.7.2.3




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