Hi Maxime, On 4 November 2011 19:09, Maxime Bizon <mbizon@xxxxxxxxxx> wrote: > > New in v2: > > Addressed all Jonas comments but the SPI register set. Since Florian > and you have upcoming SPI drivers to submit, I'll let you decide which > block deserves its own register set. > > External IRQ support has been changed slightly to handle more than 4 > irq, it now uses a fixed number range above 100. It has been tested on > 6348/58/68. Apart from patch 10/11 (and the nitpick regarding the {read,write}ll -> q) these look all fine to me. Thanks for your work! Regards, Jonas