2011/9/23 David Daney <david.daney@xxxxxxxxxx>: > The hard coded constants are moved to struct mips_pmu. All counter > register access move to the read_counter and write_counter function > pointers, which are set to either 32-bit or 64-bit access methods at > initialization time. > > Many of the function pointers in struct mips_pmu were not needed as > there was only a single implementation, these were removed. > > I couldn't figure out what made struct cpu_hw_events.msbs[] at all > useful, so I removed it too. The idea behind msbs is to simulate 32-bit counters based on the fact of MIPS using the MSB to trigger the overflow interrupt. By doing this, the average length of the overflow ISR can be shorter in the case of event period is bigger than 0x80000000. Also, it simplifies counter value related algorithms in the code - most of other architectures have 32-bit counters instead of 31-bit. In addition, taking over those bugfixes can be easier as a concequence. Deng-Cheng
