On Tue, Jul 26, 2011 at 4:31 PM, Mark Brown
<broonie@xxxxxxxxxxxxxxxxxxxxxxxxxxx> wrote:
> On Mon, Jul 25, 2011 at 01:44:45PM +0200, Manuel Lauss wrote:
>
> Looks good, I'll apply this but a few minor comments you might want to
> look at incrementally.
>
>> +#define ALCHEMY_PCM_FMTS \
>> + (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 | \
>> + SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \
>> + SNDRV_PCM_FMTBIT_U16_LE | SNDRV_PCM_FMTBIT_U16_BE | \
>> + SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S32_BE | \
>> + SNDRV_PCM_FMTBIT_U32_LE | SNDRV_PCM_FMTBIT_U32_BE | \
>> + 0)
>
> Why the | 0? Same for the other one.
Old habit in case I need to insert other format bits in the future (then
the second-to-last line need not be changed in a patch).
>> + case (DMA_D0 | DMA_D1):
>> + pr_debug("DMA %d missed interrupt.\n", stream->dma);
>> + au1000_dma_stop(stream);
>> + au1000_dma_start(stream);
>> + break;
>> + case (~DMA_D0 & ~DMA_D1):
>> + pr_debug("DMA %d empty irq.\n", stream->dma);
>
> This case should return IRQ_NONE really since it didn't handle an
> interrupt...
If that last case ever happens the DMA engine is broken, as it shouldn't
issue interrupts when no transfer is in progress. The errata sheets don't
mention anything (yet).
Thanks!
Manuel Lauss
