Hello.
On 08-10-2010 3:03, David Daney wrote:
The per-CPU clocks are synchronized from IPD_CLK_COUNT, on cn63XX it
must be scaled by the clock frequency ratio.
Signed-off-by: David Daney<ddaney@xxxxxxxxxxxxxxxxxx>
[...]
diff --git a/arch/mips/cavium-octeon/csrc-octeon.c b/arch/mips/cavium-octeon/csrc-octeon.c
index b6847c8..c85a681 100644
--- a/arch/mips/cavium-octeon/csrc-octeon.c
+++ b/arch/mips/cavium-octeon/csrc-octeon.c
[...]
@@ -33,8 +49,20 @@ void octeon_init_cvmcount(void)
* Loop several times so we are executing from the cache,
* which should give more deterministic timing.
*/
- while (loops--)
- write_c0_cvmcount(cvmx_read_csr(CVMX_IPD_CLK_COUNT));
+ while (loops--) {
+ u64 ipd_clk_count = cvmx_read_csr(CVMX_IPD_CLK_COUNT);
+ if (rdiv != 0) {
+ ipd_clk_count = ipd_clk_count * rdiv;
Why not:
ipd_clk_count *= rdiv;
WBR, Sergei
