This patch fixes a regression introduced by commit "MIPS: Alchemy: MTX-1: Use
linux gpio api." (bb706b28bbd647c2fd7f22d6bf03a18b9552be05) which broke PCI bus
operation. The problem is caused by alchemy_gpio2_enable() which resets the
GPIO2 block. Two PCI signals (PCI_SERR and PCI_RST) are connected to GPIO2 and
they obviously do not to like the reset. Since GPIO2 is correctly initialized
by the boot monitor (YAMON) it is not necessary to call this function, so just
remove it.
Also replace gpio_set_value() with alchemy_gpio_set_value() to avoid problems
in case gpiolib gets initialized after PCI. And since alchemy gpio_set_value()
calls au_sync() we don't have to au_sync() again later.
Cc: stable@xxxxxxxxxx
Signed-off-by: Bruno Randolf <br1@xxxxxxxxxxx>
---
arch/mips/alchemy/mtx-1/board_setup.c | 8 +++-----
1 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/arch/mips/alchemy/mtx-1/board_setup.c b/arch/mips/alchemy/mtx-1/board_setup.c
index a9f0336..52d883d 100644
--- a/arch/mips/alchemy/mtx-1/board_setup.c
+++ b/arch/mips/alchemy/mtx-1/board_setup.c
@@ -67,8 +67,6 @@ static void mtx1_power_off(void)
void __init board_setup(void)
{
- alchemy_gpio2_enable();
-
#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
/* Enable USB power switch */
alchemy_gpio_direction_output(204, 0);
@@ -117,11 +115,11 @@ mtx1_pci_idsel(unsigned int devsel, int assert)
if (assert && devsel != 0)
/* Suppress signal to Cardbus */
- gpio_set_value(1, 0); /* set EXT_IO3 OFF */
+ alchemy_gpio_set_value(1, 0); /* set EXT_IO3 OFF */
else
- gpio_set_value(1, 1); /* set EXT_IO3 ON */
+ alchemy_gpio_set_value(1, 1); /* set EXT_IO3 ON */
- au_sync_udelay(1);
+ udelay(1);
return 1;
}
