Re: [PATCH] MIPS: KProbes support v0.1

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On 06/08/2010 10:51 AM, Himanshu Chauhan wrote:
Hi David,

Thanks for taking a look.

[...]
+
+#define BREAKPOINT_INSTRUCTION		0x0000000d
+
+/*
+ * We do not have hardware single-stepping on MIPS.
+ * So we implement software single-stepping with breakpoint
+ * trap 'break 5'.
+ */
+#define BREAKPOINT_INSTRUCTION_2	0x0000014d

The BREAK codes are defined in asm/break.h  This should be added
there instead.

Why do you use codes (0 and 5) that are already kind of reserved for
user space debuggers?

As said ealier, this patch was based on some very older patch of 2.6.16 from
Sony Corp, I didn't make much changes like this. But anyways, I wan't aware of
this either. What would be the best code then?


How about allocating them after BRK_MEMU? Say 515 and 516 or something like that.

David Daney



[Index of Archives]     [Linux MIPS Home]     [LKML Archive]     [Linux ARM Kernel]     [Linux ARM]     [Linux]     [Git]     [Yosemite News]     [Linux SCSI]     [Linux Hams]

  Powered by Linux