On Tue, Apr 13, 2010 at 01:16:34PM +0800, Wu Zhangjin wrote: > From: Wu Zhangjin <wuzhangjin@xxxxxxxxx> > > Loongson doesn't support MIPSR2, therefore, MIPSR2 vectored interrupts > (cpu_has_vint) and MIPSR2 external interrupt controller mode > (cpu_has_veic) are 0. > > Signed-off-by: Wu Zhangjin <wuzhangjin@xxxxxxxxx> Thanks Wu, queued for 2.6.35! Ralf