Re: TI AR7 7200 - no boot

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 




Florian Fainelli-4 wrote:
> 
> Hi,
> 
> You have one of these devices with bogus UART, (there are quite some out
> there)
> can you try with the following patch and tell me if that gives you an
> usable console:
> 
> diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c
> index 246df7a..15cbeeb 100644
> --- a/arch/mips/ar7/platform.c
> +++ b/arch/mips/ar7/platform.c
> @@ -551,6 +551,7 @@ static int __init ar7_register_uarts(void)
>         uart_port.irq           = AR7_IRQ_UART0;
>         uart_port.mapbase       = AR7_REGS_UART0;
>         uart_port.membase       = ioremap(uart_port.mapbase, 256);
> +       uart_port.flags         = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
> 
>         res = early_serial_setup(&uart_port);
>         if (res)
> @@ -562,6 +563,7 @@ static int __init ar7_register_uarts(void)
>                 uart_port.irq           = AR7_IRQ_UART1;
>                 uart_port.mapbase       = UR8_REGS_UART1;
>                 uart_port.membase       = ioremap(uart_port.mapbase, 256);
> +               uart_port.flags         = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
> 
>                 res = early_serial_setup(&uart_port);
>                 if (res)
> 
> Thanks.
> -- 
> Regards, Florian
> 



after remark printk with message console color  line 2927 /drivers/char/vt.c

boot process stop with:
====================
....
Primary data cache 8kB, 4-way, VIPT, no aliases, linesize 16 bytes
Memory: 13172k/16384k available (1314k kernel code, 3212k reserved, 411k
data, 120k init, 0k highmem)
NR_IRQS:256
Calibrating delay loop... 
===============
next freeze on delay loop clculation !? IRQ not init correctly ??? 

maby after send byte over USART cpu set flag "USART TX buffer cleared"? and
kernel go to interput vector ???

=========

in kernel src 2.6.33 from mips.org patch based code not present !
/arch/mips/ar7/platform.c 

i added port number flags for version 2.6.33 ....

uart_port[0].flags         = UPF_IOREMAP | UPF_BOOT_AUTOCONF; 
uart_port[1].flags         = UPF_IOREMAP | UPF_BOOT_AUTOCONF; 

==============

after added flags and remark console collor booting stop with:

......
Primary data cache 8kB, 4-way, VIPT, no aliases, linesize 16 bytes
Memory: 13172k/16384k available (1314k kernel code, 3212k reserved, 411k
data, 120k init, 0k highmem)
NR_IRQS:256
Calibrating delay loop... 


-- 
View this message in context: http://old.nabble.com/TI-AR7-7200---no-boot-tp27766331p27766728.html
Sent from the linux-mips main mailing list archive at Nabble.com.



[Index of Archives]     [Linux MIPS Home]     [LKML Archive]     [Linux ARM Kernel]     [Linux ARM]     [Linux]     [Git]     [Yosemite News]     [Linux SCSI]     [Linux Hams]

  Powered by Linux