Hello. Wu Zhangjin wrote:
+static void __maybe_unused setup_sched_clock_update(unsigned long tclk) +{ + unsigned long data; + + data = (0xffffffffUL / tclk / 2 - 2) * HZ;Because the MIPS c0 count's frequency is half of the cpu frequency(Hi, Ralf, does every MIPS c0 count meet this feature?),
No, e.g. Alchemy's C0 Count ticks at full CPU speed. WBR, Sergei