Kumba schrieb: > > Ricardo (ricmm on IRC) explained it as this: > > <ricmm> the baseline problem is that the secondary CPU's ipi irq is not > triggering, the first one works > <ricmm> and smp_call_function() is calling an init function on both CPUs > with a wait_for_completion flag set > <ricmm> but the second CPU will never run the function as the irq is not > happening, therefore the flag will remain set > <ricmm> and smp_call_function() will spin waiting for the completion > > i think i found the problem try booting with a command line cca=5 the system is setting _page_cachable_default with what is found in the processor register at booting time which is 3 ( _CACHE_CACHABLE_NONCOHERENT ) i think this can not work on a SMP System. with the above overriding i have a working SMP Octane system. cca = 5 means _CACHE_CACHABLE_COHERENT if time permits i send patches bye
