Quoting from Loongson2FUserGuide.pdf:
5.22.1 Hazards
The processor detects most of the pipeline hazards in hardware, including CP0 hazards and
load hazards. No NOP instructions are required to correct instruction sequences.
Signed-off-by: Zhang Le <r0bertz@xxxxxxxxxx>
---
arch/mips/include/asm/hazards.h | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/mips/include/asm/hazards.h b/arch/mips/include/asm/hazards.h
index 134e1fc..19d1141 100644
--- a/arch/mips/include/asm/hazards.h
+++ b/arch/mips/include/asm/hazards.h
@@ -139,7 +139,7 @@ do { \
} while (0)
#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_CAVIUM_OCTEON) || \
- defined(CONFIG_CPU_R5500)
+ defined(CONFIG_CPU_R5500) || defined(CONFIG_CPU_LOONGSON2)
/*
* R10000 rocks - all hazards handled in hardware, so this becomes a nobrainer.
--
1.6.2
