Esteemed kernel hackers, To follow is my forth pass at MIPS watch register support. This version has been tested on: * MIPS 4KEc (mips32) with a single set of watch registers watchhi not reporting I, R, and W conditions. * MIPS 4KEc (mips32r2) with four sets of watch registers. * R5000 SGI O2 (mips4 64bit) with no watch register support. The patches are against 2.6.27-rc6 To use the patch you will need a suitably patched version of gdb. The patch against the HEAD of gdb's cvs can be found here: http://sourceware.org/ml/gdb-patches/2008-09/msg00230.html The previous version of this patch is here: http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=48B71ADD.601%40avtrex.com The main changes from the previous version are as follows... * The characteristics of each watch register set are communicated via ptrace because according to the mips32 reference, each set can have different masks and I, R, W bit support. Previously only the characteristics of the first set were returned. * The alignment of the structures passed via ptrace are explicitly specified as various versions of gcc align 64-bit objects differently. Six patches to follow. Thanks David Daney
