On Tue, Nov 20, 2007 at 10:06:44AM -0800, Kaz Kylheku wrote: > The problem is I didn't pay enough attention because I didn't suspect it > enough. > > I was misled by the backtrace address in the soft lockup dump, which > points to one instruction /before/ the ll instruction. So I thought that > the lockup is somewhere outside of that loop, right? > > Does the backward branch on MIPS set up the instruction pointer in such > a way that if an interrupt goes off, it can be pointing to the previous > instruction? I thought about that possibility. The EPC will always point to the instruction which caused the exception with the one special case where an instruction in a branch delay slot was causing the exception. If that's the case the EPC will point at the branch and the BD bit in the cause register (bit 31) will be set to indicate this special case. Ralf
