Re: WAIT vs. tickless kernel

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On Wed, 07 Nov 2007 00:39:25 +0900 (JST), Atsushi Nemoto <anemo@xxxxxxxxxxxxx> wrote:
> +	MFC0	k0, CP0_EPC
> +	ori	k0, 0x1f	/* 32 byte rollback region */
> +	xori	k0, 0x1f
> +	PTR_LA	k1, r4k_wait

Well, this part should be like this, for better pipelining.

	MFC0	k0, CP0_EPC
	PTR_LA	k1, r4k_wait
	ori	k0, 0x1f	/* 32 byte rollback region */
	xori	k0, 0x1f

> +	bne	k0, k1, 9f
> +	MTC0	k0, CP0_EPC
> +9:

And if we could assume branch-likely, this can be:

	.set	noreorder
	beql	k0, k1, 9f
	 MTC0	k0, CP0_EPC
9:

But not sure if it really have points.

>  	.align  5
> +BUILD_ROLLBACK_PROLOGUE handle_int
>  NESTED(handle_int, PT_SIZE, sp)

And one more question: should we put one more ".align 5" just befor
handle_int for CPUs do not need the rollback?

---
Atsushi Nemoto


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