Re: [PATCH] enable PCI bridges in MIPS ip32

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



On Thu, 4 Oct 2007, Ralf Baechle wrote:

> It's documented somewhere in their specs.  Whatever, it ends crashing
> the system so device 31 is hands off.

 OK, found it -- it is the GT-64120A erratum FEr#19 leading to a hang of 
the device; perhaps we should mention it briefly in the source code.

 While the PCI spec says reads from the device #31, function #7 for host 
bridges implementing the recommended special cycle generation mechanism 
have undefined results, this behaviour is certainly "undefined" in a very 
silly way and then, according to the spec, it must not happen for the 
function #0, which is the only one probed by Linux by default for 
single-function devices.

  Maciej


[Index of Archives]     [Linux MIPS Home]     [LKML Archive]     [Linux ARM Kernel]     [Linux ARM]     [Linux]     [Git]     [Yosemite News]     [Linux SCSI]     [Linux Hams]

  Powered by Linux