Hello. Atsushi Nemoto wrote:
+#define cpu_has_mips32r1 0 +#define cpu_has_mips32r2 0 +#define cpu_has_mips64r1 0 +#define cpu_has_mips64r2 0
Hm, really?
I'm not good at arch generations, so forgive me a silly complaint. ;-)
IIRC it is MIPS IV. (tx99 is MIPS64R1).
It is MIPS III.
"Upward compatible" with it as the manual says.
--- Atsushi Nemoto
WBR, Sergei
