On Sun, 1 Jul 2007, Kumba wrote: > I've got a feeling this is likely a problem in the kernel more than it is a > problem in the userland, but the question is how to go about determining which > and where. The RM7K's are pretty rare, so I imagine there's probably a few > undiscovered quirks in the code (notably the SC code in > arch/mips/mm/sc-rm7k.c). FYI, I had problems with the secondary cache of this CPU the last time I tried it with a Malta too -- random hangs of user processes. So far I have had no time to dig into it unfortunately. Maciej
