Hi Atsushi,
On 6/17/07, Atsushi Nemoto <anemo@xxxxxxxxxxxxx> wrote:
On Sun, 17 Jun 2007 15:36:53 +0200, "Franck Bui-Huu" <vagabon.xyz@xxxxxxxxx> wrote:
> b) Are there some weird MIPS CPUs out there which don't read/ack cp0
> hpt in the normal way ?
PNX8550? Their count/compare interrupt altomatically clears the count
register. Please refer this thread:
http://www.linux-mips.org/archives/linux-mips/2006-12/msg00194.html
Oh no, another weirdo :(
What is suprising me is that there's no comment explaining what is
going on in pnx8550/common/time.c...
I'm not sure this fits new clockevent codes or not.
Not really. What could be done in this case is to use cp0 hpt for
dealing with clock events _only_. I don't think it's an issue if the
count register is automatically cleared in this case.
And it should write it's own clocksource support which would use
different timer.
It shoud result in something like this:
unsigned __init get_freq(int cpu)
{
return 27UL * ((1000000UL * n)/(m * pow2p));
}
void __init plat_timer_init()
{
struct cp0_hpt_info info;
info.get_freq = get_freq;
info.irq = PNX8550_INT_TIMER1;
setup_cp0_hpt(&info, CLKEVT_ONLY);
setup_my_clocksource_using_a_different_timer();
}
Note that 'CLKEVT_ONLY' flag currently doesn't exist.
What do you think ?
--
Franck
