Re: [PATCH] [MIPS] Fixed PCI resource fixup

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On Fri, 12 Jan 2007 22:54:59 +0900 (JST)
Atsushi Nemoto <anemo@xxxxxxxxxxxxx> wrote:

> On Fri, 12 Jan 2007 11:46:18 +0900, Yoichi Yuasa <yoichi_yuasa@xxxxxxxxxxxxxx> wrote:
> > > If io_offset = 0, GT-64120 must be programmed to remap physicall
> > > address GT_DEF_PCI0_IO_BASE to PCI IO address 0.  Maybe other GT-64120
> > > users have such configuraion?
> > 
> > GT-64111(used for Cobalt) has no remap register.
> > It cannot be programmed to address remap.
> 
> Then, inb(0) converted to physical address 0x10000000
> (GT_DEF_PCI0_IO_BASE), and on PCI bus it is PCI IO address 0? or
> 0x10000000?

When PCI base address register set 0x1000(I/O space), inb(0x1000) reads wrong value
(tulip net driver reads wrong eeprom data).

When PCI base address register set 0x10001000(I/O space), inb(0x1000) reads valid value.
PCI I/O address and CPU bus address seem to have to be same.

> 
> If PCI IO address was 0, io_offset should be 0.  Otherwise, io_offset
> should be -0x10000000, as current code does.

Based on the above result, io_offset should be -0x10000000.

> So if it does not work now, something's going wrong... but I have no
> idea now.

Yoichi


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