On Mon, 23 Oct 2006 16:32:24 +0400, Sergei Shtylyov <sshtylyov@xxxxxxxxxxxxx> wrote: > > This trick is due to range of TRR register. The width of the counter > > field is 24bit, but the range is not 0 - 0xffffff. It wraps at some > > non-all-F value. So mips_hpt_mask can not help this. > > This happens not due to a nature of this timer itself but due to > the fact that it's used to generate the jiffy interrupt, and > therefore the comparator register (which is obviously set to > non-0xFFFFFF value) guiding its behavior. There's no sense (or even > need) in using it as a clock source -- TX3927 has 3 timers! So, you > need to just use some other timer than #0 and set the comparator A > to 0xFFFFFF for it... > > > But this loop is not correct indeed. If it called without xtime_lock > > and interrupt disabled, it would return wrong value. I should think > > again ... > > The whole idea of using such timer as TX39 has for both > generating the interrupts and as a clocksource was wrong, I'm > afraid. You only can use a something similar to the MIPS counter > which doesn't ever get auto-reloaded for both purposes at once. Sure, we can do this improvement and it would be a right direction. But for now I just want to get previous facility back again. And anyway I think someone who still have interest on this platform should make it buildable and bootable before further improvement ;-) --- Atsushi Nemoto
