Re: patch: include/asm-mips/system.h __cmpxchg64 bugfix and cleanup

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It's not a good style... you shouldn't be relying on optimization to
protect you from bad coding practices. It goes against the
style of the other macros defined by the config and leads to bugs like
this:

Signed-off-by: Antonio SJ Musumeci <bile@xxxxxxxxxxxxxx>

diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index cc895da..4084dc3 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -842,7 +842,7 @@ static void __init probe_pcache(void)
                c->dcache.ways = 4;
                c->dcache.waybit = __ffs(dcache_size / c->dcache.ways);

-#if !defined(CONFIG_SMP) || !defined(RM9000_CDEX_SMP_WAR)
+#if !defined(CONFIG_SMP) || !RM9000_CDEX_SMP_WAR
                c->options |= MIPS_CPU_CACHE_CDEX_P;
 #endif
                c->options |= MIPS_CPU_PREFETCH;



On Wed, 18 Oct 2006 19:41:59 +0100
Thiemo Seufer <ths@xxxxxxxxxxxx> wrote:

> Antonio SJ Musumeci wrote:
> > I'm not talking about that. This patch explains it. Moving
> > the conditional compilation from the optimizer to the preprocessor.
> > I see no reason to be using hard coded 1's and 0's in runtime logic.
> 
> It is easier to read than a ifdef maze, and the net result is the
> same.
> 
> 
> Thiemo
> 
> 


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