Hi Yiochi, Yes. You are right. To Ralf: Please consider the codes for wrppmc board go into the current merge window. Thanks. Best Regards, Mark. Zhan -----Original Message----- From: linux-mips-bounce@xxxxxxxxxxxxxx [mailto:linux-mips-bounce@xxxxxxxxxxxxxx] On Behalf Of Yoichi Yuasa Sent: Tuesday, June 20, 2006 10:27 PM To: Ralf Baechle Cc: linux-mips@xxxxxxxxxxxxxx Subject: [PATCH] remove set_c0_status(ST0_IM) form wrppmc's irq.c Hi, mips_cpu_irq_init() does clear_c0_status(ST0_IM) first. I think that set_c0_status(ST0_IM) isn't necessary. Yoichi Signed-off-by: Yoichi Yuasa <yoichi_yuasa@xxxxxxxxxxxxxx> diff -pruN -X mips/Documentation/dontdiff mips-orig/arch/mips/gt64120/wrppmc/irq.c mips/arch/mips/gt64120/wrppmc/irq.c --- mips-orig/arch/mips/gt64120/wrppmc/irq.c 2006-06-20 21:17:36.853537000 +0900 +++ mips/arch/mips/gt64120/wrppmc/irq.c 2006-06-20 21:36:41.949101000 +0900 @@ -62,9 +62,6 @@ void gt64120_init_pic(void) void __init arch_init_irq(void) { - /* enable all CPU interrupt bits. */ - set_c0_status(ST0_IM); /* IE bit is still 0 */ - /* IRQ 0 - 7 are for MIPS common irq_cpu controller */ mips_cpu_irq_init(0);
