Atsushi Nemoto wrote:
> On Thu, 20 Apr 2006 01:19:00 +0100, Thiemo Seufer <ths@xxxxxxxxxxxx> wrote:
> > > +#define ELF64_MIPS_R_TYPE(i) \
> > > + (((_Elf64_Mips_R_Info_union)(i)).r_info_fields.r_type1 \
> > > + | ((Elf32_Word)(__extension__ (_Elf64_Mips_R_Info_union)(i) \
> > > + ).r_info_fields.r_type2 << 8) \
> > > + | ((Elf32_Word)(__extension__ (_Elf64_Mips_R_Info_union)(i) \
> > > + ).r_info_fields.r_type3 << 16) \
> > > + | ((Elf32_Word)(__extension__ (_Elf64_Mips_R_Info_union)(i) \
> > > + ).r_info_fields.r_ssym << 24))
> >
> > Why is it the right thing to combine the type info into a 32bit word?
>
> Well, I just take ELF64_MIPS_R_TYPE() from glibc source.
It is not more useful in glibc. :-) Any use of the TYPE data will have
to take the MIPS64 specifics in account, and thus split it up again
into single characters.
> > It will never get used as such for MIPS ELF64. I would have expected
> > something like:
> >
> > #define ELF64_MIPS_R_INFO(sym,ssym,t3,t2,t1) \
> > {( \
> > _Elf64_Mips_R_Info info = { \
> > .r_sym = sym, \
> > .r_ssym = ssym, \
> > .r_type3 = t3, \
> > .r_type2 = t2, \
> > .r_type1 = t1, \
> > } \
> > (Elf64_Xword)info; \
> > )}
> >
> > without a corresponding ELF64_MIPS_R_TYPE, and then:
> >
> > if (hdr->e_ident[EI_CLASS] == ELFCLASS64
> > && hdr->e_machine == EM_MIPS) {
> > _Elf64_Mips_R_Info info = (_Elf64_Mips_R_Info)r.r_info;
> > r.r_info = ELF64_MIPS_R_INFO(TO_NATIVE(info.r_sym),
> > info.r_ssym, info.r_type3,
> > info.r_type2, info.r_type1);
> > }
>
> Sorry, I can not see what you mean ... it just does byte-swap only
> r_sym part, doesn't it? It is not enough because a position of r_sym
> in MIPS ELF64 r_info is different from standard ELF64 r_info.
But it does so for a _Elf64_Mips_R_Info struct, which already keeps
the position of its r_sym field endianness independent.
Thiemo
