Atsushi Nemoto wrote:
> On Mon, 17 Apr 2006 17:27:42 +0100, Thiemo Seufer <ths@xxxxxxxxxxxx> wrote:
> > So it is the
> >
> > r.r_info = TO_NATIVE(rela->r_info);
> >
> > in modpost.c which breaks both SYM and TYPE because it assumes a
> > 64bit integer. The proper solution would be to add a Elf64_Mips_Rela
> > structure (with lots of nearly identical duplicated code), the hack
> > would be to cast r_info to a 32bit integer for mips, before feeding
> > it to TO_NATIVE (which works until somebody asks for the TYPE, then
> > a separate mips64 version becomes inevitable.)
>
> I'd like to fix in _proper_ way. Please review. Thanks.
>
>
> 64bit mips has different r_info layout. This patch fixes modpost
> segfault for 64bit little endian mips kernel.
>
> Signed-off-by: Atsushi Nemoto <anemo@xxxxxxxxxxxxx>
>
> diff --git a/scripts/mod/modpost.c b/scripts/mod/modpost.c
> index cd00e9f..4ce95c6 100644
> --- a/scripts/mod/modpost.c
> +++ b/scripts/mod/modpost.c
> @@ -710,7 +710,20 @@ static void check_sec_ref(struct module
> Elf_Rela r;
> const char *secname;
> r.r_offset = TO_NATIVE(rela->r_offset);
> +#if KERNEL_ELFCLASS == ELFCLASS64
> + if (hdr->e_machine == EM_MIPS) {
> + unsigned int r_sym =
> + ELF64_MIPS_R_SYM(rela->r_info);
> + unsigned int r_type =
> + ELF64_MIPS_R_TYPE(rela->r_info);
> + r.r_info = ELF_R_INFO(TO_NATIVE(r_sym),
> + TO_NATIVE(r_type));
[snip]
> +/* The 64-bit MIPS ELF ABI uses an unusual reloc format. */
> +typedef struct
> +{
> + Elf32_Word r_sym; /* Symbol index */
> + unsigned char r_ssym; /* Special symbol for 2nd relocation */
> + unsigned char r_type3; /* 3rd relocation type */
> + unsigned char r_type2; /* 2nd relocation type */
> + unsigned char r_type1; /* 1st relocation type */
> +} _Elf64_Mips_R_Info;
[snip]
> +#define ELF64_MIPS_R_TYPE(i) \
> + (((_Elf64_Mips_R_Info_union)(i)).r_info_fields.r_type1 \
> + | ((Elf32_Word)(__extension__ (_Elf64_Mips_R_Info_union)(i) \
> + ).r_info_fields.r_type2 << 8) \
> + | ((Elf32_Word)(__extension__ (_Elf64_Mips_R_Info_union)(i) \
> + ).r_info_fields.r_type3 << 16) \
> + | ((Elf32_Word)(__extension__ (_Elf64_Mips_R_Info_union)(i) \
> + ).r_info_fields.r_ssym << 24))
Why is it the right thing to combine the type info into a 32bit word?
It will never get used as such for MIPS ELF64. I would have expected
something like:
#define ELF64_MIPS_R_INFO(sym,ssym,t3,t2,t1) \
{( \
_Elf64_Mips_R_Info info = { \
.r_sym = sym, \
.r_ssym = ssym, \
.r_type3 = t3, \
.r_type2 = t2, \
.r_type1 = t1, \
} \
(Elf64_Xword)info; \
)}
without a corresponding ELF64_MIPS_R_TYPE, and then:
if (hdr->e_ident[EI_CLASS] == ELFCLASS64
&& hdr->e_machine == EM_MIPS) {
_Elf64_Mips_R_Info info = (_Elf64_Mips_R_Info)r.r_info;
r.r_info = ELF64_MIPS_R_INFO(TO_NATIVE(info.r_sym),
info.r_ssym, info.r_type3,
info.r_type2, info.r_type1);
}
Thiemo
