On Tue, 14 Feb 2006 16:42:16 +0900 (JST) Atsushi Nemoto <anemo@xxxxxxxxxxxxx> wrote: > >>>>> On Tue, 14 Feb 2006 16:07:29 +0900, Yoichi Yuasa <yoichi_yuasa@xxxxxxxxxxxxxx> said: > yuasa> I added the patch and tested it. It has same problem. > > Thank you. I realize the reason just now. VR41XX's PTE format is a > bit different from others. I should use mk_pte() to wrap these > difference. > > Could you try this patch? 64BIT_PHYS_ADDR + MIPS32_R1 part are not > tested ;-) This patch fixed the boot problem, but the kernel still has cache coherency problem. ~# ./cachetest Test separation: 4096 bytes: FAIL - cache not coherent Test separation: 8192 bytes: pass Test separation: 16384 bytes: pass Test separation: 32768 bytes: pass Test separation: 65536 bytes: pass Test separation: 131072 bytes: pass Test separation: 262144 bytes: pass Test separation: 524288 bytes: pass Test separation: 1048576 bytes: pass Test separation: 2097152 bytes: pass Test separation: 4194304 bytes: pass Test separation: 8388608 bytes: pass Test separation: 16777216 bytes: pass VM page alias coherency test: minimum fast spacing: 8192 (2 pages) I'm using the following test program. http://lkml.org/lkml/2003/8/29/6 Yoichi
