On Thu, Oct 20, 2005 at 12:02:33PM +0100, Dominic Sweetman wrote: > > The reason for this old commit was that this code is running > > uncached, so the operation of ll/sc in the spinlocks is undefined > > according to the MIPS64 spec... > > The answer is more complicated. MIPS64 (elsewhere) requires that the > ll/sc "link" is broken on an exceptin - in fact on an 'eret' > instruction. But in case of the code in question no eret will be executed between taking the cache error exception and printk trying to take the lock. > So ll/sc on an uncached location works just fine in a uniprocessor. > However, it's unlikely that any cache-coherent mulitprocessor system > will snoop uncached reads and writes, so it won't work in an SMP > system. Fine - but at that point we could have two processors messing with the same buffers. Bad Thing (TM). Ralf
