Fix zero length sys_cacheflush

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

 



I found cacheflush(0, 0, 0) will crash the system.

This is because flush_icache_range(start, end) tries to flushing whole
address space (0 - ffffffff) if both start and end are zero (at least
in c-r4k.c).

Signed-off-by: Atsushi Nemoto <anemo@xxxxxxxxxxxxx>

diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c
--- a/arch/mips/mm/cache.c
+++ b/arch/mips/mm/cache.c
@@ -56,6 +56,8 @@ EXPORT_SYMBOL(_dma_cache_inv);
 asmlinkage int sys_cacheflush(unsigned long __user addr,
 	unsigned long bytes, unsigned int cache)
 {
+	if (bytes == 0)
+		return 0;
 	if (!access_ok(VERIFY_WRITE, (void __user *) addr, bytes))
 		return -EFAULT;
 


[Index of Archives]     [Linux MIPS Home]     [LKML Archive]     [Linux ARM Kernel]     [Linux ARM]     [Linux]     [Git]     [Yosemite News]     [Linux SCSI]     [Linux Hams]

  Powered by Linux