On Wednesday 20 October 2004 20:13, Manish Lachwani wrote: > TITAN_GE_WRITE(0x0024, 0x04000024); /* IRQ vector */ > TITAN_GE_WRITE(0x0020, 0x000fb000); /* INTMSG base */ Hi Manish, it was the location of these two lines that I was asking for. So they are in the ethernet driver. Wouldn't you agree that they should go into the platform instead? The interrrupt is shared with other devices, the DUART to name just one example, and if I want to write a driver for these, then that driver would depend on the ethernet driver, if that does the interrupt setup. So this covers the message interrupts, but I also have not been able so far to spot the location where the corresponding setup is done for the external interrupt lines, that is, setting up the INTPINx registers. Any hints? thank you, Thomas -- -------------------------------------------------- Thomas Koeller, Software Development Basler Vision Technologies thomas dot koeller at baslerweb dot com http://www.baslerweb.com ==============================
