On Mon, Jul 12, 2004 at 11:48:31PM +0200, Kevin D. Kissell wrote: > Your intuition is correct, and the code in r4k_tlb_init() does look scary. Not scarry at all. flush_icache_range() has to do whatever is needed to maintain I-cache coherency for the range passed in as the argument. And I don't think we should really have to deal with all the complicated details of cache maintenance in a function like r4k_tlb_init(). > But at least in the linux-mips CVS tree, flush_icache_range() tests to see > if "cpu_has_ic_fills_f_dc" (CPU has Icache fills from Dcache, I presume) Right. Cpu_has_ic_fills_f_dc is only non-zero for the AMD processors where the I-cache is refilled from the D-cache. For typical kernel configurations The definition of cpu_has_ic_fills_f_dc is a constant so the compiler can optimize this further. Ralf
