Hi folks, I noticed the following thread "locking problem with mips atomicity" on the GCC mailing list, and I started to wonder if the linux kernel has the same problem. http://gcc.gnu.org/ml/gcc/2004-03/threads.html#01061 It about the problem that gcc can generate loads (using AT) in between the ll and sc instructions (which is not legal according to the MIPS spec) This can happen when incorrect constraints are used with the inline assembly, and the inline assembly happens to be in an inline functions. The code from linux 2.4.26 arch-mips/atomic.h looks _very_ similar to the code described in the thread that has a BUG. static __inline__ void atomic_add(int i, atomic_t * v) { unsigned long temp; __asm__ __volatile__( "1: ll %0, %1 # atomic_add\n" " addu %0, %2 \n" " sc %0, %1 \n" " beqz %0, 1b \n" : "=&r" (temp), "=m" (v->counter) : "Ir" (i), "m" (v->counter)); } So I wonder if there is a bug here. Can some MIPS guru check ? :) Please copy me on replies as I'm not subscribed Kind regards, Harm Verhagen
