On Thu, Oct 09, 2003 at 04:03:20PM +0200, Ralf Baechle wrote: > It's got a limitation - it only works on physically indexed D-caches or > more exactly processors that don't suffer from cache aliases. On > processors that have such aliases the necessary flushes are rather bad > for performance so this currently simply isn't suported. Small update - I changed the memory managment code to ignore highmem on cache configuration that are not supported by the highmem code. Ralf
